diff options
author | alekseiplusplus <alekseijeaves@protonmail.com> | 2023-04-10 20:46:43 +1000 |
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committer | alekseiplusplus <alekseijeaves@protonmail.com> | 2023-04-10 20:46:43 +1000 |
commit | a4a9590148fdae2f656b25dd1d7b442969726c28 (patch) | |
tree | fe90cef94de50e38a667eb41b0c8bb98a4465c9b /addressing.h | |
parent | fbca225d25db812fe7823a8528dff17320cf1c53 (diff) |
Changed pointer switch case to if else for now
Diffstat (limited to 'addressing.h')
-rw-r--r-- | addressing.h | 172 |
1 files changed, 101 insertions, 71 deletions
diff --git a/addressing.h b/addressing.h index 9c57592..1bfc61e 100644 --- a/addressing.h +++ b/addressing.h @@ -19,9 +19,6 @@ enum Addressing { typedef int Addressing; -//Holds address of current instruction. -void (*current_instruction)(Addressing, address); - struct AddData{ int cycles; int length; @@ -29,6 +26,18 @@ struct AddData{ byte value; }; +typedef struct AddData AddData; + + + +#include"instruction-init.h" + + +//Holds address of current instruction. +void (*current_instruction)(Addressing, address); + + + AddData fAddress(Addressing addr, short x) { AddData ret; @@ -85,7 +94,7 @@ AddData fAddress(Addressing addr, short x) { break; default: - ret.value = Memory[ret.add] + ret.value = Memory[ret.add]; } @@ -102,83 +111,104 @@ AddData fAddress(Addressing addr, short x) { // CYCLES - switch(current_function){ // Initial value - case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY: case &fEOR: case &fLDA: - case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY: - switch(addr){ - case eImmediate: - ret.cycles = 2; break; - case eZeroPage: - ret.cycles = 3; break; - case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: - ret.cycles = 4; break; - case eIndexedIndirect: - ret.cycles = 6; break; - case eIndirectIndexed: - ret.cycles = 5; break; - } - break; + //case &fADC: case &fAND: case &fBIT: case &fCMP: case &fCPX: case &fCPY: case &fEOR: case &fLDA: + //case &fLDX: case &fLDY: case &fORA: case &fSBC: case &fSTX: case &fSTY: + + if ( current_instruction == &fADC || current_instruction == &fAND || current_instruction == &fBIT || current_instruction == &fCMP || current_instruction == &fCPX + || current_instruction == &fCPY || current_instruction == &fEOR || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY + || current_instruction == &fORA || current_instruction == &fSBC || current_instruction == &fSTX || current_instruction == &fSTY ){ + switch(addr){ + case eImmediate: + ret.cycles = 2; break; + case eZeroPage: + ret.cycles = 3; break; + case eZeroPageIndexedX: case eAbsolute: case eAbsoluteIndexedX: case eAbsoluteIndexedY: + ret.cycles = 4; break; + case eIndexedIndirect: + ret.cycles = 6; break; + case eIndirectIndexed: + ret.cycles = 5; break; + } + } + + //case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR: + else if (current_instruction == &fASL || current_instruction == &fDEC || current_instruction == &fINC + || current_instruction == &fLSR || current_instruction == &fROL || current_instruction == &fROR ){ + switch(addr){ + case eAccumulator: + ret.cycles = 2; break; + case eZeroPage: + ret.cycles = 5; break; + case eZeroPageIndexedX: case eAbsolute: + ret.cycles = 6; break; + case eAbsoluteIndexedX: + ret.cycles = 7; break; + } + } - case &fASL: case &fDEC: case &fINC: case &fLSR: case &fROL: case &fROR: - switch(addr){ - case eAccumulator: - ret.cycles = 2; break; - case eZeroPage: - ret.cycles = 5; break; - case eZeroPageIndexedX: case eAbsolute: - ret.cycles = 6; break; - case eAbsoluteIndexedX: - ret.cycles = 7; break; - } - break; + //case &fSTA: + else if (current_instruction == &fSTA){ + switch(addr){ + case eZeroPage: + ret.cycles = 3; break; + case eZeroPageIndexedX: case eAbsolute: + ret.cycles = 4; break; + case eAbsoluteIndexedX: case eAbsoluteIndexedY: + ret.cycles = 5; break; + case eIndexedIndirect: case eIndirectIndexed: + ret.cycles = 6; break; + } + } - case &fSTA: - switch(addr){ - case eZeroPage: - ret.cycles = 3; break; - case eZeroPageIndexedX: case eAbsolute: - ret.cycles = 4; break; - case eAbsoluteIndexedX: case eAbsoluteIndexedY: - ret.cycles = 5; break; - case eIndexedIndirect: case eIndirectIndexed: - ret.cycles = 6; break; - } - break; - case &fBRK: - ret.cycles = 7; - break; + //case &fBRK: + else if (current_instruction == &fBRK){ + ret.cycles = 7; + } - case &RTI: case &RTS: case &JSR: - ret.cycles = 6; - break; - case &fJMP: - ret.cycles = 5; - break; + //case &fRTI: case &fRTS: case &fJSR: + else if (current_instruction == &fRTI || current_instruction == &fRTS || current_instruction == &fJSR){ + ret.cycles = 6; + } - case &fPLA: case &fPLP: - ret.cycles = 4; - break; + //case &fJMP: + else if (current_instruction == &fJMP){ + ret.cycles = 5; + } - case &fPHA: case &fPHP: - ret.cycles = 3; - break; + //case &fPLA: case &fPLP: + else if (current_instruction == &fPLA || current_instruction == &fPLP){ + ret.cycles = 4; + } - default: - ret.cycles = 2; + //case &fPHA: case &fPHP: + else if (current_instruction == &fPHA || current_instruction == &fPHP){ + ret.cycles = 3; } - switch(current_function){ // Page Boundary - case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP: - switch(addr){ - case eAbsoluteIndexedX: - if ((x & 0xFFFC) != ((x + X) & 0xFFFC)) ret.cycles++; break; - case eAbsoluteIndexedY: - if ((x & 0xFFFC) != ((x + Y) & 0xFFFC)) ret.cycles++; break; - case eIndirectIndexed: - if ((ret.add & 0xFFFC) != (ret.add - Y & 0xFFFC)) ret.cycles++; break; - } + else { + ret.cycles = 2; } + + + // Page Boundary + + + + + //case &fADC: case &fSBC: case &fLDA: case &fLDX: case &fLDY: case &fEOR: case &fAND: case &fORA: case &fCMP: + if ( current_instruction == &fADC || current_instruction == &fSBC || current_instruction == &fLDA || current_instruction == &fLDX || current_instruction == &fLDY + || current_instruction == &fEOR || current_instruction == &fAND || current_instruction == &fORA || current_instruction == &fCMP ){ + switch(addr){ + case eAbsoluteIndexedX: + if ((x & 0xFFFC) != ((x + X) & 0xFFFC)) ret.cycles++; break; + case eAbsoluteIndexedY: + if ((x & 0xFFFC) != ((x + Y) & 0xFFFC)) ret.cycles++; break; + case eIndirectIndexed: + if ((ret.add & 0xFFFC) != (ret.add - Y & 0xFFFC)) ret.cycles++; break; + } + } + } |